This invention relates generally to semiconductor chip package assemblies, and in particular to organic build-up package substrates used in such packages. More specifically, the invention relates to multi-layer organic build-up package substrates having both fibrous and non fibrous dielectric layers, and to associated packages and methods of manufacture.
Multi-layered, organic build-up package substrates were developed to respond to the need for high-speed, large-scale integrated circuit assemblies. Circuits are formed on pure copper conductors, keeping resistance low. Insulation layers are formed from organic resin, such as Ajinomoto Build-up Film (ABF), providing low permittivity and enable the fine pitch line and space requirements of increasingly high bump density flip chips.
However, packages using these organic build-up substrates have had problems meeting reliability requirements. This is believed to be due to the high coefficient of thermal expansion (CTE) mismatch between the silicon-based die (about 2.6) and the organic build-up material (e.g., ABF has a CTE of about 50). The problem is exacerbated in the case of low-k dies, particularly large low-k dies, which use low-K dielectric materials. Low-k materials have very low mechanical strength compared to the traditional SiO2 dielectric films due to their porous nature, which results in lower cohesive strength and greater brittleness. Thus, low-k dies are more susceptible to cracking and/or failure under thermal expansion mismatch induced stresses than conventional dielectrics. Accordingly, improved organic build-up package substrates are needed.